Computer Safety, Reliability, and Security: 33rd by Andrea Bondavalli, Felicita Di Giandomenico (eds.)
By Andrea Bondavalli, Felicita Di Giandomenico (eds.)
This publication constitutes the refereed lawsuits of the 33nd foreign convention on machine protection, Reliability, and safety, SAFECOMP 2014, held in Florence, Italy, in September 2014. The 20 revised complete papers provided including three functional event studies have been rigorously reviewed and chosen from eighty five submissions. The papers are geared up in topical sections on fault injection concepts, verification and validation options, car structures, assurance types and mitigation strategies, insurance circumstances and arguments, method research, defense and belief, notations/languages for safeguard similar features, protection and security.
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Extra info for Computer Safety, Reliability, and Security: 33rd International Conference, SAFECOMP 2014, Florence, Italy, September 10-12, 2014. Proceedings
Additionally, we picked MiBench’s  automotive benchmark category as a set of real-world application benchmarks. The four benchmarks (qsort, basicmath, bitcount, susan, using the small input data set) each execute more dynamic instructions than all eCos benchmarks combined and represent a more heavyweight workload for our tooling. To determine the “ground truth” for our pruning experiments, we ran FI experiments for all def/use equivalence classes of our benchmarks, resulting in the total (single-CPU) simulation time shown in the last column of Tab.
4 Implementation We implemented a tool set for the outlined fault-space pruning approach in the Fail*  FI experimentation framework, conﬁgured to run with the Bochs x86 simulator . Ideally, we would simulate faults in a detailed register transfer and gate-level processor model; however, since simulation of realistic benchmarks on low-level models is extremely slow, this work chooses a fast architecture simulator. We extended the tracing plugin of Fail* with the capability to record the additional machine state listed in Tab.
Fig. 6 shows an extract of the results of the the 5th simulation. For the sake of simplicity, we omit input signals of emergency and service brakes from the ﬁgure. 7 Conclusion This paper introduced a testing and simulated fault injection framework for timetriggered dependable-systems based on the PS-TTM approach. The environment enables testing and injecting faults at diﬀerent stages of the design, from platform independent models to platform speciﬁc models, what enables an early detection of design ﬂaws in the system.